Learn VHDL and FPGA Development [UDEMY]

Learn VHDL and FPGA Development

Learn VHDL and FPGA Development

Learn VHDL and FPGA Development for Beginners and Intermediates is a course that is designed to teach students how to create and successfully simulate their VHDL design. We will also be implementing these designs on a Xilinx BASYS 3 or BASYS 2 FPGA development board so that the students can see their designs actually running.

This course contains over 20 lectures that will teach students the syntax and structure of VHDL. The student will be able to understand the syntax and use of specific VHDL keywords by taking this course. There are lectures included in each lab to give a background on the digital logic circuit the student will be implementing.

Who is the target audience?

  • Engineering Students
  • Engineering Managers
  • Digital Logic Enthusists
  • Individuals pursuing Electrical Engineering
  • Anyone who wants to take it for fun!

What Will I Learn?

  • Understand the design process for implementing a digital design onto a FPGA
  • Learn how to simulate a design in Altera’s ModelSim and Xilinx Isim
  • Learn how to use Xilinx ISE tool to program FPGA
  • Debug a VHDL design using ModelSim
  • Simulate a VHDL design using ModelSim
  • Familiarize yourself with Altera and Xilinx tools
  • Program a FPGA

Website: Visit
Author: Jordan Christman
4.5 hours on-demand video


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